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BS ISO 21780:2020 Road vehicles — Supply voltage of 48 V — Electrical requirements and tests. 8.8 Test procedure The test procedure shall he defined in conjunction with the customer and documented within a test plan. For each test, as applicable, the permitted error memory entries and the functional statuses for each function of thecomponent shall be agreed with the customer and documented within the test plan. Details of the test setup, operating loads (e.g. triggering, original sensors, original actuators and replacement circuitry) and the required boundary conditions shall he agreed between the customer and the supplier and documented in a test plan and in the resultant test report. Components that are electrically both a source and a sink shall be tested in both modes of operation. The test equipment shall ensure that all interfaces which are required to meet the specified performance of the DUT are populated and functional to the required level. Signals or messages which shall be received from or transmitted to the vehicle controller in order to ensure the DLJT functions as expected may be simulated if a full vehicle or HIL simulation is not used. In all cases, program and data storage devices shall remain in FS1 until the component is deactivated. If the device has non-volatile memory, the integrity (not the current status) of the non-volatile memory shall be ensured at all times. Damage to the DUT is not permitted in FSI to FS4. The permissible limit values specified in the data sheets (e.g. electrical, thermal or mechanical) of the electric/electronic components in the DUT shall not be exceeded. Evidence of this is provided at least by the parameter check as described in 9. An electrical test begins when the DUT has started up completely and is in FS1. Before and after every test, the DUTs shall be subjected to a parameter check as described in 9 in accordance with specifications. The DUT shall be in a steady state of temperature at the beginning of each test. During each test, the key parameters to be monitored shall he recorded as described in 8.1O. Component resets shall he monitored and documented in an appropriate form to be included in the test report. Damaged DUTs (FS5) shall be removed from the test cycle, analysed regarding the root cause for the failure and documented. In such cases, the test shall be repeated with a new DIJT, or...

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